• H. Park, I. Yeo, S. Pae and K.-W. Kwon, "Inducing Opposite-Direction Flips: The Discharged-to-Charged Anomaly in Rowhammer via In-DRAM Error-Correcting Codes," Journal of Systems Architecture, accepted.
  • J. Cho, M. Jeon, Y. Kwon, K.-W. Kwon, Y. Lee, "QSPLIT: A GUI-based testing framework for quantum split learning," SoftwareX, Vol. 34, Mar. 2026
  • D. Park, H.-D. Park, I.-G. Yeo, J. Kim, S.-H. Lee, S. Lee, H.-S. Shin, S. Pae, D. Fan, J. Kung and K.-W. Kwon, “A Survey on Binary and Ternary Neural Networks and Their Realization in Compute-in-Memory for Edge Intelligence,” IEEE Internet of Things Journal, Jan. 2026
  • K.-W. Kwon and Y. Seo, "Hybrid Multi-Level Cell Spin-Orbit Torque Memory for Fast and Robust Memory Operations," IEEE Transactions on Nanotechnology, Jul. 2025
  • H.-D. Park, I.-G. Yeo, H. Yeo and K.-W. Kwon, "Rowhammer와 On-Die ECC 상호작용기반 보안 취약점 분석," 부채널정보분석경진대회 (한국인터넷진흥원장상) , Jul. 2025
  • H. Yeo, S. Lee and K.-W. Kwon, "최신 해시 알고리즘의 무작위성 비교 분석," 대한전자공학회 하계학술대회, Jun. 2025
  • S. H. Choi, M. Kang; K.-W. Kwon, J. S. Kim, J.-M. Jung, and H.-M. Lee, "An Energy-Efficient Real-Time Wearable ECG Acquisition System with Near-Data Pre-Diagnosis for Mobile Applications," IEEE Transactions on Instrumentation and Measurement, Mar. 2025
  • S. Hwang, K.-W. Kwon, and Y. Kim, "Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing," IEEE Embedded Systems Letters, Feb. 2025
  • K.-W. Kwon, K. Kim, K. Doo, H. Chung, and J.W. Lee, "Low-Complexity Architecture for High-Speed 50G-PON LDPC Decoder," IEEE Access, Feb. 2025
  • H. Kim, K.-W. Kwon, and Y. Seo, "Complementary Polarizer SOT-MRAM for Low-Power and Robust On-Chip Memory Applications," Electronics, Sep. 2024
  • H. Jo, M. Kang, M. Um, J. Kim, K.-W. Kwon, S. Kim, and H.-M. Lee, "Verification of Neuromorphic Processing Accuracy against Non-Ideal Errors in Synapse-based Neural Network Systems," International Journal of Circuit Theory and Applications, Jun. 2024
  • M. Lim, S. Park, S. Lee, J. Yoon, P. Hong, H. Yoo, K.-W. Kwon, J. Jeong, Y. Lee, "VELCRO: A visual-based programming tool for effortless deep learning model construction," SoftwareX, vol. 26, May 2024
  • D. Kim, H. Park, I. Yeo, Y. Lee, , Y. Kim, H.-M. Lee, K.-W. Kwon, "Rowhammer Attacks in Dynamic Random-Access Memory and Defense Methods," Sensors, vol. 17, Jan. 2024
  • C. Moon, P. Pujar, S. Gandla, B. So, S. Lee, D. Kim, K.-W. Kwon, S. Kim, "Anticounterfeiting tags based on randomly oriented MoSx clusters enabled by capillary and Marangoni flow," Communications Materials, vol. 4, Nov. 2023
  • Y. Seo and K.-W. Kwon, "Ultra High-Density SOT-MRAM Design for Last-Level On-Chip Cache Application," Electronics, vol. 12, Oct. 2023
  • J.-W. Huh, H.-D. Park, I.-G. Yeo, D.-Y. Kim, K.-W. Kwon and D.-G. Han, “DDR4 DRAM의 소프트웨어 기반 Rowhammer 기법과 전자파 오류주입 기반 Ehammer 기법에 관한 연구,” 한국정보보호학회 하계학술대회 (우수논문상) , Jun. 2023
  • Y. Seo and K.-W. Kwon, “High-Density 1R/1W Dual-Port Spin-Transfer Torque MRAM,” Micromachines, vol. 13, Dec. 2022
  • S. Pae and K.-W. Kwon, “Majority Approximators for Low-Latency Data Bus Inversion,” Electronics, vol. 11, Oct. 2022
  • S. Pae and K.-W. Kwon, “Latency-optimized design of data bus inversion,” Electronics, vol. 11, Mar. 2022
  • D. Park, K.-W. Kwon, S. Im, J. Kung, “ZeBRA: Precisely Destroying Neural Networks with Zero-Data Based Repeated Bit Flip Attack,” The British Machine Vision Conference, Nov. 2021
  • Y. Seo and K.-W. Kwon, “Area Optimization Techniques for High-Density Spin-Orbit Torque MRAMs,” Electronics, vol. 10, Mar. 2021
  • S. Pae, V. Kozhikkottu, D. Somasekar, W. Wu, S. Ramasubramanian, M. Dadual, H. Cho, and K.-W. Kwon, “Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement,” IEEE Access, vol. 9, Feb. 2021
  • K.-W. Kwon, “Optimal bus coding for OR-chained buses,” IEICE Electronics Express, vol. 18, no. 3, Jan. 2021
  • D. Park and K.-W. Kwon, “시력 취약 계층을 위한 신용 카드 번호 인식 연구,” 전기전자학회논문지, vol. 25, no. 1, Mar. 2021
  • Y. Seo and K.-W. Kwon, “Area-optimized design of SOT-MRAM,” IEICE Electronics Express, vol. 17, no. 21, Oct. 2020
  • K.-W. Kwon, “Spin Hall Effect–Based Nonvolatile Flip Flop for Fine Grained Power Gating,” IEIE Transactions on Smart Processing and Computing, vol. 8, no. 5, 2019
  • H.M. Cho and K.-W. Kwon, “Modeling Application-Level Soft Error Effects for Single-Event Multi-Bit Upsets,” IEEE Access, Sep. 2019
  • M.J. Kim, S.H. Chae, Y.B. Shim, D.H. Lee, M.J. Kim, Y.K. Moon, and K.-W. Kwon, “Design and Implementation of Magnetic Induction based Wireless Underground Communication System Supporting Distance Measurement,” KSII Transactions on Internet and Information Systems, vol. 13, no. 8, Aug. 2019
  • K.-W. Kwon, “Energy Reduction in Asymmetric Write Operations of STT-MRAMs,” Journal of Semiconductor Technology and Science, vol. 18, no. 3, June 2018
  • Y. Seo, K.-W. Kwon, X. Fong, and K. Roy, “High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 6, no. 3, Sep. 2016
  • Y. Seo, K.-W. Kwon, and K. Roy, “Area-efficient SOT-MRAM with a Schottkky diode,” IEEE Electron Device Letters, vol. 37, no. 8, Aug. 2016
  • K.-W. Kwon, X. Fong, P. Wijesinghe, P. Panda, and K. Roy, “High-density and robust STT-MRAM array through device/circuit/architecture interactions,” IEEE Transactions on Nanotechnology, vol.14, no. 6, Nov. 2015
  • Y. Kim, X. Fong, K.-W. Kwon, M. C. Chen, and K. Roy, “Multilevel spin-orbit torque MRAMs,” IEEE Transactions on Electron Devices, vol. 14, no. 6, Feb. 2015
  • Y. Seo, X. Fong, K.-W. Kwon, and K. Roy, “Spin-hall magnetic random-access memory with dual read/write ports for on-chip caches,” IEEE Magnetic Letters, vol. 6, June 2015
  • K.-W. Kwon, S. H. Choday, Y. Kim, X. Fong, S.P. Park and K. Roy, “SHE-NVFF: Spin Hall Effect based Nonvolatile Flip Flop for Power Gating Architecture,” IEEE Electron Device Letters, vol. 35, no. 4, April 2014
  • K.-W. Kwon, S. H. Choday, Y. Kim and K. Roy, “AWARE (Asymmetric Write Architecture with REdundant blocks): A High Write Speed STT-MRAM Cache Architecture,” IEEE Trans. on VLSI Systems, April 2014
  • S.H. Harsha, K.-W. Kwon and K. Roy, “Workload dependent evaluation of thin-film thermoelectric devices for on-chip cooling and energy harvesting,” IEEE ICCAD, Nov. 2014
  • K. Yogendra, M. Sharad, K.-W. Kwon and K. Roy, “Design of Ultra High Density and Low Power Computational Blocks using Nano-Magnets,” IEEE ISQED, Mar. 2012
  • K.-W. Kwon, K.-H. Baek, and J. W. Lee, “High-Speed and Low-Complexity Decoding Architecture for Double Binary Turbo Code,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science, Nov. 2011
  • K.-W. Kwon, J. Park, B. Lee, K.-H. Baek, and S. Kim, "Efficient CTC Interleaver and Deinterleaver for the WiMAX Standard,” International SoC Design Conference, Nov. 2008
  • K.-W. Kwon, Y. Kim, J. Park, K.-H. Baek, and S. Kim, “An Efficient Architecture of an Improved Max-Log-MAP Algorithm for Double Binary Turbo Decoding,” 2008 Conference on Information and Control System, pp. 388-389, 2008
  • K. Lim, K.-W. Kwon, H. Park, J. Kim, J.-J. Sung, K.-H. Baek and S. Kim, “Design an Infrared Wireless Optical Mouse System and a Dual-band Infrared Receiver,” The 15th IEEE International Conference On Electronics, Circuits and Systems, Aug. 2008
  • J. Kim, J. Park, K. Lee, B. Lee, K. Kwon and S. Kim, “Security Camera Processor using One-bit Motion Detection,” International SoC Design Conference, 2007.